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Calibration Techniques for High Speed Time-Interleaved SAR ADC

機譯:高速時間交錯SAR ADC的校準(zhǔn)技術(shù)

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摘要

The emerging applications such as Internet-of-Things (IoT), self-driven car and artificial intelligence (AI) trigger rapid increase in bandwidth demand in data centers and telecommunication infrastructure. The data traffic in global network is expected to be tripled by 2020 and the ITRS predicts the IO speed to exceed 60GB/s in 2020. ADC-based backplane receivers and coherent fiber-optical receivers are promising technologies for the next generation wireline communication systems. For both technologies, high speed analog-to-digital converter (ADC) of over 20GS/s is one key enabler. For 5G wireless communication system high resolution ADC (12bit) with sampling speed over 1GHz is required. Many other application also demands ADC with performance that has never been achieved before while only provides a strict power budget. Time-interleaving massive slow-but-efficient subADCs to achieve the target is one practical way. However, the benefit brought by time-interleaving is not free. Mismatch between subADCs often limits its linearity making the performance of the array far from the individual subADCs. Among all different kinds of mismatches, dynamic mismatch including skew and bandwidth mismatch are the hardest to identify and cure. This dissertation will introduce two different methods to calibrate the skew mismatch of TI-ADC. Two fabricated chip 12b 1GS/s and 6b 24GS/s will be shown as the silicon verification of the proposed methods.
機譯:物聯(lián)網(wǎng)(IoT),自動駕駛汽車和人工智能(AI)等新興應(yīng)用觸發(fā)了數(shù)據(jù)中心和電信基礎(chǔ)設(shè)施對帶寬需求的快速增長。預(yù)計到2020年,全球網(wǎng)絡(luò)中的數(shù)據(jù)流量將增加兩倍,ITRS預(yù)測,到2020年IO速度將超過60GB / s?;贏DC的背板接收器和相干光纖接收器是下一代有線通信系統(tǒng)的有希望的技術(shù)。對于這兩種技術(shù),超過20GS / s的高速模數(shù)轉(zhuǎn)換器(ADC)都是關(guān)鍵的推動力。對于5G無線通信系統(tǒng),需要采樣速度超過1GHz的高分辨率ADC(12位)。許多其他應(yīng)用也要求ADC具有前所未有的性能,而只能提供嚴(yán)格的功率預(yù)算。時間交織的大量慢速但高效的子ADC實現(xiàn)目標(biāo)是一種實用的方法。但是,時間交織帶來的好處并不是免費的。子ADC之間的不匹配通常會限制其線性度,從而使陣列的性能遠(yuǎn)離各個子ADC。在所有不同類型的失配中,最難識別和解決的動態(tài)失配包括偏斜和帶寬失配。本文將介紹兩種不同的校準(zhǔn)TI-ADC偏斜失配的方法。將顯示兩個制造的芯片12b 1GS / s和6b 24GS / s作為所提出方法的硅驗證。

著錄項

  • 作者

    Xu, Benwei.;

  • 作者單位

    The University of Texas at Dallas.;

  • 授予單位 The University of Texas at Dallas.;
  • 學(xué)科 Electrical engineering.
  • 學(xué)位 Ph.D.
  • 年度 2017
  • 頁碼 90 p.
  • 總頁數(shù) 90
  • 原文格式 PDF
  • 正文語種 eng
  • 中圖分類 康復(fù)醫(yī)學(xué);
  • 關(guān)鍵詞

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