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首頁(yè)> 美國(guó)衛(wèi)生研究院文獻(xiàn)>Frontiers in Neuroscience >Performance Comparison of the Digital Neuromorphic Hardware SpiNNaker and the Neural Network Simulation Software NEST for a Full-Scale Cortical Microcircuit Model
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Performance Comparison of the Digital Neuromorphic Hardware SpiNNaker and the Neural Network Simulation Software NEST for a Full-Scale Cortical Microcircuit Model

機(jī)譯：數(shù)字神經(jīng)形態(tài)硬件SpiNNaker和神經(jīng)網(wǎng)絡(luò)仿真軟件NEST在全比例皮質(zhì)微電路模型中的性能比較

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The digital neuromorphic hardware SpiNNaker has been developed with the aim of enabling large-scale neural network simulations in real time and with low power consumption. Real-time performance is achieved with 1 ms integration time steps, and thus applies to neural networks for which faster time scales of the dynamics can be neglected. By slowing down the simulation, shorter integration time steps and hence faster time scales, which are often biologically relevant, can be incorporated. We here describe the first full-scale simulations of a cortical microcircuit with biological time scales on SpiNNaker. Since about half the synapses onto the neurons arise within the microcircuit, larger cortical circuits have only moderately more synapses per neuron. Therefore, the full-scale microcircuit paves the way for simulating cortical circuits of arbitrary size. With approximately 80, 000 neurons and 0.3 billion synapses, this model is the largest simulated on SpiNNaker to date. The scale-up is enabled by recent developments in the SpiNNaker software stack that allow simulations to be spread across multiple boards. Comparison with simulations using the NEST software on a high-performance cluster shows that both simulators can reach a similar accuracy, despite the fixed-point arithmetic of SpiNNaker, demonstrating the usability of SpiNNaker for computational neuroscience applications with biological time scales and large network size. The runtime and power consumption are also assessed for both simulators on the example of the cortical microcircuit model. To obtain an accuracy similar to that of NEST with 0.1 ms time steps, SpiNNaker requires a slowdown factor of around 20 compared to real time. The runtime for NEST saturates around 3 times real time using hybrid parallelization with MPI and multi-threading. However, achieving this runtime comes at the cost of increased power and energy consumption. The lowest total energy consumption for NEST is reached at around 144 parallel threads and 4.6 times slowdown. At this setting, NEST and SpiNNaker have a comparable energy consumption per synaptic event. Our results widen the application domain of SpiNNaker and help guide its development, showing that further optimizations such as synapse-centric network representation are necessary to enable real-time simulation of large biological neural networks.
機(jī)譯：數(shù)字神經(jīng)形態(tài)硬件SpiNNaker的開(kāi)發(fā)旨在實(shí)現(xiàn)實(shí)時(shí)，低功耗的大規(guī)模神經(jīng)網(wǎng)絡(luò)仿真。實(shí)時(shí)性能以1 ms的積分時(shí)間步長(zhǎng)實(shí)現(xiàn)，因此適用于可以忽略動(dòng)力學(xué)更快的時(shí)間尺度的神經(jīng)網(wǎng)絡(luò)。通過(guò)減慢仿真速度，可以整合更短的積分時(shí)間步長(zhǎng)，從而獲得更快的時(shí)間標(biāo)度，而這通常是生物學(xué)相關(guān)的。我們?cè)谶@里描述了在SpiNNaker上具有生物時(shí)間標(biāo)度的皮質(zhì)微電路的第一個(gè)全面模擬。由于大約有一半的神經(jīng)元突觸出現(xiàn)在微電路內(nèi)，因此較大的皮層回路每個(gè)神經(jīng)元的突觸僅適中。因此，滿量程的微電路為模擬任意大小的皮層電路鋪平了道路。該模型具有約80,000個(gè)神經(jīng)元和3億個(gè)突觸，是SpiNNaker迄今為止最大的仿真模型。 SpiNNaker軟件堆棧的最新開(kāi)發(fā)實(shí)現(xiàn)了放大，從而使仿真可以分布在多個(gè)板上。與使用高性能集群上的NEST軟件進(jìn)行的仿真比較表明，盡管SpiNNaker具有定點(diǎn)算法，這兩種仿真器仍可以達(dá)到相似的精度，這證明了SpiNNaker在具有生物學(xué)時(shí)間尺度和較大網(wǎng)絡(luò)規(guī)模的計(jì)算神經(jīng)科學(xué)應(yīng)用中的可用性。還以皮質(zhì)微電路模型為例，評(píng)估了兩個(gè)模擬器的運(yùn)行時(shí)間和功耗。為了以0.1 ms的時(shí)間步長(zhǎng)獲得與NEST相似的精度，與實(shí)時(shí)相比，SpiNNaker需要的減速系數(shù)約為20。使用帶有MPI和多線程的混合并行化功能，NEST的運(yùn)行時(shí)間可以達(dá)到3倍實(shí)時(shí)飽和。但是，實(shí)現(xiàn)此運(yùn)行時(shí)間的代價(jià)是增加了功率和能耗。 NEST的最低總能耗在144個(gè)并行線程處達(dá)到4.6倍。在此設(shè)置下，NEST和SpiNNaker在每個(gè)突觸事件中具有可比的能耗。我們的結(jié)果拓寬了SpiNNaker的應(yīng)用領(lǐng)域，并有助于指導(dǎo)其發(fā)展，顯示出進(jìn)一步的優(yōu)化（例如以突觸為中心的網(wǎng)絡(luò)表示）是實(shí)現(xiàn)大型生物神經(jīng)網(wǎng)絡(luò)實(shí)時(shí)仿真所必需的。

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