Capture and emission mechanisms of defect states at interface between nitride semiconductor and gate oxides in GaN-based metal-oxide- semiconductor power transistors

Huang Sen; Wang Xinhua; Liu Xinyu; Zhao Rui; Shi Wen; Zhang Yichuan; Fan Jie; Yin Haibo; Wei Ke; Zheng Yingkui; Shi Jingyuan; Wang Xiaolei; Wang Wenwu; Sun Qian; Chen Kevin J.

首頁> 外文期刊>Journal of Applied Physics >Capture and emission mechanisms of defect states at interface between nitride semiconductor and gate oxides in GaN-based metal-oxide- semiconductor power transistors

【24h】

Capture and emission mechanisms of defect states at interface between nitride semiconductor and gate oxides in GaN-based metal-oxide- semiconductor power transistors

機(jī)譯：GaN基金屬氧化物半導(dǎo)體功率晶體管氮化物半導(dǎo)體和柵極氧化物界面界面缺陷狀態(tài)的捕獲和排放機(jī)制

獲取原文

獲取原文并翻譯 | 示例

開具論文收錄證明 >>

頁面導(dǎo)航

摘要
著錄項(xiàng)
引文網(wǎng)絡(luò)
相似文獻(xiàn)
相關(guān)主題

摘要

A physical insight into the capture and emission behavior of interface/oxide states in a GaN-based metal-oxide-semiconductor (MOS) structure is of great importance to understanding the threshold voltage (V-TH) instability in GaN power transistors. A time-dependent V-TH shift in Ni/Al2O3/AlGaN/GaN MOS-HFETs (heterojunction field-effect transistors) and a distribution of Al2O3/III-nitride interface states (D-it) were successfully characterized by constant-capacitance deep level transient spectroscopy. It is found that in situ remote plasma pretreatments in plasma-enhanced atomic-layer-deposition could suppress Dit (E-C-E-T 0.4 eV) down to below 1.3 x 10(12) cm(-2) eV(-1). Under high applied gate bias (e.g., V-G 8 V), tunnel filling of oxide states in the Al2O3 dielectric comes into play, contributing to remarkable V-TH instability in the MOS-HFETs. The tunnel distance between the 2D Electron Gas (2DEG) channel and oxide states E-T,E-ox in the Al2O3 dielectric decreases from 3.75 to 0.82 nm as VG increases from 2 to 8 V. A further increase of V-G to 11 V makes the Fermi level approach E-T,E-ox (E-C - E-T similar to 1.62 eV), which may enable direct filling. High electric field induced tunnel filling of gate oxide states could be an assignable cause for VTH instability in normally-OFF III-nitride MOS-HFETs. Published under license by AIP Publishing.

機(jī)譯：在GaN基金屬 - 氧化物 - 半導(dǎo)體（MOS）結(jié)構(gòu)中對界面/氧化物狀態(tài)的捕獲和排放行為的物理見解非常重要，可以理解GaN功率晶體管中的閾值電壓（V-Th）不穩(wěn)定性。通過恒定電容深度成功地表征了Ni / Al2O3 / AlGaN / GaN MOS-HFET（異質(zhì)結(jié)場效應(yīng)晶體管）和Al2O3 / III-氮化物界面狀態(tài)（D-IT）的分布的時(shí)間依賴性的第V班。水平瞬態(tài)光譜。發(fā)現(xiàn)，原位遠(yuǎn)程血漿預(yù)處理等離子體增強(qiáng)的原子層沉積可以抑制低于1.3×10（12）厘米（-2）EV（-1）的DIT（E-C-E-T> 0.4eV）。在高施加的柵極偏置（例如，V-G> 8V）下，Al2O3電介質(zhì)中的氧化物狀態(tài)的隧道填充到發(fā)揮作用，有助于MOS-HFET中的顯著V-TH不穩(wěn)定性。 Al2O3電介質(zhì)中的2D電子氣（2deg）通道和氧化物狀態(tài)等的隧道距離從3.75?0.82nm降低，因?yàn)閂g從2?8 V增加。Vg至11V的進(jìn)一步增加使得費(fèi)米成為Fermi水平方法ET，E-OX（EC-ET類似于1.62eV），可以實(shí)現(xiàn)直接填充。高電場誘導(dǎo)柵極氧化物狀態(tài)的隧道填充可以是常常氮化物MOS-HFET中的Vth不穩(wěn)定性的可分配原因。通過AIP發(fā)布在許可證下發(fā)布。

著錄項(xiàng)

來源
《Journal of Applied Physics》 |2019年第16期|164505.1-164505.8|共8頁
作者
Huang Sen; Wang Xinhua; Liu Xinyu; Zhao Rui; Shi Wen; Zhang Yichuan; Fan Jie; Yin Haibo; Wei Ke; Zheng Yingkui; Shi Jingyuan; Wang Xiaolei; Wang Wenwu; Sun Qian; Chen Kevin J.;
展開▼
作者單位

Chinese Acad Sci Key Lab Microelect Devices & Integrated Technol Inst Microelect Beijing 100029 Peoples R China|Univ Chinese Acad Sci Sch Microelect Beijing 100049 Peoples R China;

Chinese Acad Sci Key Lab Microelect Devices & Integrated Technol Inst Microelect Beijing 100029 Peoples R China;

Chinese Acad Sci Key Lab Microelect Devices & Integrated Technol Inst Microelect Beijing 100029 Peoples R China|Univ Chinese Acad Sci Sch Microelect Beijing 100049 Peoples R China;

Chinese Acad Sci Key Lab Microelect Devices & Integrated Technol Inst Microelect Beijing 100029 Peoples R China|Univ Chinese Acad Sci Sch Microelect Beijing 100049 Peoples R China;

Chinese Acad Sci Key Lab Microelect Devices & Integrated Technol Inst Microelect Beijing 100029 Peoples R China|Univ Chinese Acad Sci Sch Microelect Beijing 100049 Peoples R China;

Chinese Acad Sci Key Lab Microelect Devices & Integrated Technol Inst Microelect Beijing 100029 Peoples R China|Univ Chinese Acad Sci Sch Microelect Beijing 100049 Peoples R China;

Chinese Acad Sci Key Lab Microelect Devices & Integrated Technol Inst Microelect Beijing 100029 Peoples R China;

Chinese Acad Sci Key Lab Microelect Devices & Integrated Technol Inst Microelect Beijing 100029 Peoples R China;

Chinese Acad Sci Key Lab Microelect Devices & Integrated Technol Inst Microelect Beijing 100029 Peoples R China;

Chinese Acad Sci Key Lab Microelect Devices & Integrated Technol Inst Microelect Beijing 100029 Peoples R China;

Chinese Acad Sci Key Lab Microelect Devices & Integrated Technol Inst Microelect Beijing 100029 Peoples R China;

Chinese Acad Sci Key Lab Microelect Devices & Integrated Technol Inst Microelect Beijing 100029 Peoples R China;

Chinese Acad Sci Key Lab Microelect Devices & Integrated Technol Inst Microelect Beijing 100029 Peoples R China|Univ Chinese Acad Sci Sch Microelect Beijing 100049 Peoples R China;

Chinese Acad Sci Suzhou Inst Nanotech & Nanobion Suzhou 215123 Peoples R China;

Hong Kong Univ Sci & Technol Dept Elect & Comp Engn Kowloon Hong Kong 999077 Peoples R China;

展開▼
收錄信息美國《科學(xué)引文索引》(SCI);美國《工程索引》(EI);美國《生物學(xué)醫(yī)學(xué)文摘》(MEDLINE);
原文格式 PDF
正文語種 eng
中圖分類
關(guān)鍵詞

相似文獻(xiàn)

外文文獻(xiàn)
中文文獻(xiàn)
專利

1. Characterization of interface states in AlGaN/GaN metal-oxide- semiconductor heterostructure field-effect transistors with HfO_2 gate dielectric grown by atomic layer deposition [J] . R. Stoklas, D. Gregu?ová, S. Hasen?hrl, Applied Surface Science . 2018,第DECa15期

機(jī)譯：具有通過原子層沉積生長的HfO_2柵介質(zhì)的AlGaN / GaN金屬氧化物半導(dǎo)體異質(zhì)結(jié)構(gòu)場效應(yīng)晶體管中界面態(tài)的表征
2. Interface trap and oxide charge generation under negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin plasma-nitrided SiON gate dielectrics [J] . Shiyang Zhu, Anri Nakajima, Takuo Ohashi, Journal of Applied Physics . 2005,第11期

機(jī)譯：具有超薄等離子氮化SiON柵極電介質(zhì)的p溝道金屬氧化物半導(dǎo)體場效應(yīng)晶體管在負(fù)偏置溫度不穩(wěn)定性下的界面陷阱和氧化物電荷產(chǎn)生
3. Alteration of Gate-Oxide Trap Capture/Emission Time Constants by Channel Hot-Carrier Effect in the Metal-Oxide-Semiconductor Field-Effect Transistor [J] . Ju Xin, Ang Diing Shenp Quality Control, Transactions . 2020,第期

機(jī)譯：通過信道熱載波效應(yīng)在金屬氧化物半導(dǎo)體場效應(yīng)晶體管中的溝通捕獲/發(fā)射時(shí)間常數(shù)的改變
4. Modeling of Spiking Analog Neural Circuits with Hebbian Learning, Using Amorphous Semiconductor Thin Film Transistors with Silicon Oxide Nitride Semiconductor Split Gates [C] . Richard Wood, Ian Bruce, Peter Mascher International conference on artificial neural networks . 2012

機(jī)譯：使用具有氮化硅氮化物半導(dǎo)體分柵的非晶半導(dǎo)體薄膜晶體管，利用Hebbian學(xué)習(xí)對尖峰模擬神經(jīng)電路進(jìn)行建模
5. Gate dielectric investigations of ultra-thin oxide and nitride /oxide stack for nanometer N- and P -channel metal-oxide-semiconductor field-effect-transistors [D] . Yee, Kam Fu 2000

機(jī)譯：納米N溝道和P溝道金屬氧化物半導(dǎo)體場效應(yīng)晶體管的超薄氧化物和氮化物/氧化物堆疊的柵極電介質(zhì)研究
6. Oxygen Defect-Induced Metastability in Oxide Semiconductors Probed by Gate Pulse Spectroscopy [O] . Sungsik Lee, Arokia Nathan, Sanghun Jeon, -1

機(jī)譯：柵極脈沖光譜法探測氧化物半導(dǎo)體中的氧缺陷誘導(dǎo)的亞穩(wěn)定性
7. The temperature dependence of the electron mobility degradation mechanisms in n-channel metal-oxide- semiconductor field effect transistors with ZrO2 and Sm2O3 gate dielectrics [O] . H. S. Ho 2012

機(jī)譯：具有ZrO2和Sm2O3柵極電介質(zhì)的n溝道金屬氧化物半導(dǎo)體場效應(yīng)晶體管中電子遷移率降低機(jī)制的溫度依賴性
8. Total Dose Response of Silicon-on-Insulator (SOI) Metal-Oxide- Semiconductor Field-Effect Transistor's (MOSFET's) [R] . Biwer, M. C. 1988

機(jī)譯：絕緣體上硅（sOI）金屬氧化物半導(dǎo)體場效應(yīng)晶體管（mOsFET's）的總劑量響應(yīng)

国产bbaaaaa片,成年美女黄网站色视频免费,成年黄大片,а天堂中文最新一区二区三区,成人精品视频一区二区三区尤物

Capture and emission mechanisms of defect states at interface between nitride semiconductor and gate oxides in GaN-based metal-oxide- semiconductor power transistors

摘要

著錄項(xiàng)

引文網(wǎng)絡(luò)

相似文獻(xiàn)

相關(guān)主題

期刊訂閱